SP2 Wafers

Once high-purity (solar grade) silicon has been obtained (see SP1, Feedstock) it has to be brought into a form suitable for solar cells. CRYSTALCLEAR is about crystalline silicon in the form of wafers. In addition to the purity of the silicon used, the crystal quality determines to a large extent the solar cell efficiency that can be obtained. This crystal quality, in turn, is determined by the crystallization method and process control.

In most cases silicon wafers are obtained by ingot crystallization, yielding large blocks of crystalline silicon, followed by sawing. Subproject 2 focuses on the two crucial steps required to turn feedstock into wafers: ingot crystallization and wafer sawing. First, emphasis will be achieving a higher productivity of the crystallization equipment (the furnaces), by applying larger crucibles and by better usage of the capacity. This will lead to an increase of the ingot weight by about 80%. Second, the utilization of ingot material will be increased dramatically by different improvements of the sawing process. With standard wire-sawing the wafer size will be increased from typically 125 x 125 mm2 today to 200 x 200 mm2. In a parallel development the wafer thickness will be decreased from about 300 µm today to 150 µm, while the kerf width will be reduced to less than 200 µm. Thus the consumption of silicon per Wp is expected to fall by about 40%.

Using novel cutting processes based on the use of lasers instead of saws, in the longer term the wafer thickness may even be decreased to 100 µm or less, at a kerf width as small as 100 µm. As the cutting-induced surface damage is expected to be much lower with this technique, damage etching (usually removing several tens of microns of material) can probably be avoided and more silicon can be utilized.

In addition to the work on ingots and sawing or cutting, research will be done on an alternative method for wafer formation, namely ribbon growth (EFG, Edge-defined Film-fed Growth). More specifically, the compatibility of new feedstock materials (see SP1) with this ribbon technology will be investigated. Further, ribbon material made in other projects by the Ribbon-Growth-on-Substrate (RGS) method will be tested using process techniques developed in CRYSTALCLEAR (see also SP4).







An FP6 integrated project

The consumption of silicon per Wp is expected to fall by about 40%.